Minimising both peak and average power consumption is a significant design consideration for many signal processing applications, and the need to balance performance with reduced power consumption is complicated for multi-core systems with increasing levels of parallelism where the performance demanded from the system can no longer be viewed as a single variable over time. Furthermore, for applications that involve timing-critical processes, power reduction techniques are required to have minimal performance impact on those timing-critical processes.
The use of CPU low power modes is known for reducing power consumption within signal processing applications. However, conventional techniques rely on execution of dedicated software to manage low power modes, requiring customisation of software, and introducing latencies in execution of application code. Long application software development times drive the use of a large amount of legacy software, complicating the adoption of new, more sophisticated software-controlled power reduction techniques.